1. Field of the Invention
The present invention relates to a semiconductor device such as a thin-film transistor manufacturing apparatus, and a thin-film transistor manufacturing method using the apparatus.
2. Description of the Prior Art
FIG. 1 is a cross-sectional view showing a structure of the thin-film transistor to be used as pixel display switching devices in active matrix display panels. A bottom-gate type is shown in this figure.
On a surface of an insulating transparent substrate 1 is positioned a gate electrode 2 of a refractory metal, such as tungsten or chromium. The gate electrode 2 has both sides in a tapered shape widening toward the transparent substrate 1. On the transparent substrate 1 on which the gate electrode 2 is positioned, a silicon oxide film 4 is formed through a silicon nitride film 3. The silicon nitride film 3 prevents impurities contained in the transparent substrate 1 from penetrating an active region (to be described later), and the silicon oxide film 4 functions as a gate insulating film. On the silicon oxide film 4 is formed a polycrystalline silicon film 5 so as to straddle the gate electrode 2. The polycrystalline silicon film 5 becomes the active region of the thin-film transistor.
On the polycrystalline silicon film 5 is positioned a stopper 6 of an insulating material, such as silicon oxide. A portion of the polycrystalline silicon film 5 covered by the stopper 6 becomes a channel region 5c, and other portions of the polycrystalline silicon film 5 become a source region 5s and a drain region 5d. On the polycrystalline silicon film 5, on which the stopper 5 is formed, is formed a silicon oxide film 7 and a silicon nitride film 8. The silicon oxide film 7 and silicon nitride film 8 serve as interlayer insulating films to protect the polycrystalline silicon film 5 that includes the source region 5s and drain region 5d.
Contact holes 9 are formed at predetermined locations in the silicon oxide film 7 and silicon nitride film 8 on the source region 5s and drain region 5d. A source electrode 10s and a drain electrode 10d, which connect to the source region 5s and drain region 5d, are positioned at the contact holes 9. On the silicon nitride film 8, on which the source electrode 10s and drain electrode 10d are positioned, an acrylic resin layer 11, which is transparent to visible light, is formed. The acrylic resin layer 11 planarizes the surface by filling in the unevenness caused by the gate electrode 2 and stopper 6.
A contact hole 12 is formed in the acrylic resin layer 11 on the source electrode 10s. A transparent electrode 13, such as of indium tin oxide (ITO), that connects to the source electrode 10s through the contact hole 12 is then positioned so as to extend on the acrylic resin layer 11. The transparent electrode 13 forms a pixel electrode in a liquid crystal display panel.
In the above-mentioned thin-film transistor, a plurality of which are arranged in a matrix on the transparent substrate 1 together with pixel electrodes, image data supplied to the drain electrode 10d is impressed onto the respective pixel electrode in response to a scanning control signal that is impressed on the gate electrode 2.
The polycrystalline silicon film 5 is formed with a sufficiently large crystal grain diameter so that it functions as the active region of the thin-film transistor. A known method for forming a large crystal grain diameter of the polycrystalline silicon film 5 is laser annealing using an excimer laser. In laser annealing, amorphous silicon is formed onto the silicon oxide film 4, which becomes a gate insulating film, and after the hydrogen contained in the amorphous silicon is first removed through a low temperature heat treatment, the silicon is irradiated with the excimer laser and is initially melted so that the silicon crystallizes. Since portions on the transparent substrate 1 reaching high temperatures are localized due to the use of this sort of laser annealing method, a glass substrate having a low melting point can be used for the transparent substrate 1.
Formation of the silicon oxide film and silicon nitride film comprising the gate insulating film and interlayer insulating film is also possible at a low temperature of 400.degree. C. or less and employs a highly flexible plasma CVD method. Since the plasma CVD method also makes it possible for the formation of amorphous silicon films, the formation of the amorphous silicon film, which becomes the polycrystalline silicon film 5, is normally performed by the same apparatus in succession to the formation of the gate insulating film.
When impurities are added during film formation in the polycrystalline silicon film 5, which forms the active region of the thin-film transistor, the impurities prevent carrier movement in the channel region 5c and cause the operating characteristics to deteriorate. In the plasma CVD method, when the gate insulating film and the amorphous silicon film, which becomes the polycrystalline silicon film 5, are formed in succession within the same film formation chamber, it becomes easy to contaminate the amorphous silicon film with the residual reactant gas used in the formation of the gate insulating film. Usually, during the formation of the gate insulating film, the same film is formed on the inner wall of the film formation chamber. With this sort of film formed, when the plasma for forming the amorphous silicon film within the film formation chamber is excited, the impurities are discharged from the film formed on the inner wall of the film formation chamber. Since the impurities discharged within the film formation chamber are taken into the amorphous silicon film, it is difficult to prevent the contamination by impurities even though the reactant gas within the film formation chamber is completely discharged.